10 Facts About Multiple patterning

Multiple patterning is a class of technologies for manufacturing integrated circuits, developed for photolithography to enhance the feature density.

Pitch double-Multiple patterning was pioneered by Gurtej Singh Sandhu of Micron Technology during the 2000s, leading to the development of 30-nm class NAND flash memory.

Multi-Multiple patterning has since been widely adopted by NAND flash and random-access memory manufacturers worldwide.

In spacer Multiple patterning, a spacer is a film layer formed on the sidewall of a pre-patterned feature.

Many approaches for spacer Multiple patterning have been published, all targeting the improved management of the cuts.

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Self-aligned contact and via patterning is an established method for patterning multiple contacts or vias from a single lithographic feature.

Self-aligned triple Multiple patterning has been considered as a promising successor to SADP, due to its introduction of a second spacer offering additional 2D Multiple patterning flexibility and higher density.

Multiple patterning entails the use of many processing steps to form a patterned layer, where conventionally only one lithographic exposure, one deposition sequence and one etch sequence would be sufficient.

Evolution of multiple patterning is being considered in parallel with the emergence of EUV lithography.

In other words, the multiple patterning is not prohibitive, but more like a nuisance and growing expense.