31 Facts About ARM Thumb


However, ARM Thumb processors are used for desktops and servers, including the world's fastest supercomputer from 2020 to 2022.

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The ARM Thumb design added special vector-like memory access instructions, the "S-cycles", that could be used to fill or save multiple registers in a single page using page mode.

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The first samples of ARM Thumb silicon worked properly when first received and tested on 26 April 1985.

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The ARM Thumb2 had a transistor count of just 30,000, compared to Motorola's six-year-older 68000 model with around 68,000.

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Successor, ARM Thumb3, was produced with a 4 KB cache, which further improved performance.

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Apple used the ARM Thumb6-based ARM Thumb610 as the basis for their Apple Newton PDA.

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In 2011, the 32-bit ARM Thumb architecture was the most widely used architecture in mobile devices and the most popular 32-bit one in embedded systems.

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In 2013,10 billion were produced and "ARM Thumb-based chips are found in nearly 60 percent of the world's mobile devices".

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In February 2016, ARM Thumb announced the Built on ARM Thumb Cortex Technology licence, often shortened to Built on Cortex licence.

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Companies that have designed cores that implement an ARM Thumb architecture include Apple, AppliedMicro, Broadcom, Cavium, Digital Equipment Corporation, Intel, Nvidia, Qualcomm, Samsung Electronics, Fujitsu, and NUVIA Inc.

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ARM Thumb cores are used in a number of products, particularly PDAs and smartphones.

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ARM Thumb chips are used in Raspberry Pi, BeagleBoard, BeagleBone, PandaBoard, and other single-board computers, because they are very small, inexpensive, and consume very little power.

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Except in the M-profile, the 32-bit ARM Thumb architecture specifies several CPU modes, depending on the implemented architecture features.

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Original ARM Thumb implementation was hardwired without microcode, like the much simpler 8-bit 6502 processor used in prior Acorn microcomputers.

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ARM Thumb includes integer arithmetic operations for add, subtract, and multiply; some versions of the architecture support divide operations.

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Almost every ARM Thumb instruction has a conditional execution feature called predication, which is implemented with a 4-bit condition code selector.

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One of the ways that ARM Thumb code provides a more dense encoding is to remove the four-bit selector from non-branch instructions.

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ARM Thumb processor has features rarely seen in other RISC architectures, such as PC-relative addressing and pre- and post-increment addressing modes.

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Higher-performance designs, such as the ARM Thumb9, have deeper pipelines: Cortex-A8 has thirteen stages.

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The difference between the ARM Thumb7DI and ARM Thumb7DMI cores, for example, was an improved multiplier; hence the added "M".

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ARM Thumb architecture provides a non-intrusive way of extending the instruction set using "coprocessors" that can be addressed using MCR, MRC, MRRC, MCRR, and similar instructions.

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The space saving comes from making some of the instruction operands implicit and limiting the number of possibilities compared to the ARM Thumb instructions executed in the ARM Thumb instruction set state.

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ARM's smallest processor families implement only the 16-bit Thumb instruction set for maximum performance in lowest cost applications.

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ARM Thumb-2 extends the limited 16-bit instruction set of ARM Thumb with additional 32-bit instructions to give the instruction set more breadth, thus producing a variable-length instruction set.

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ARM Thumb-2 extends the ARM Thumb instruction set with bit-field manipulation, table branches and conditional execution.

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Some devices such as the ARM Thumb Cortex-A8 have a cut-down VFPLite module instead of a full VFP module, and require roughly ten times more clock cycles per float operation.

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Typical applications include DRM functionality for controlling the use of media on ARM Thumb-based devices, and preventing any unapproved use of the device.

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ARM Thumb provides a reference stack of secure world code in the form of Trusted Firmware for M and PSA Certified.

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The ARM Thumb instruction set is referred to as "T32" and has no 64-bit counterpart.

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ARM Thumb announced their Cortex-A53 and Cortex-A57 cores on 30 October 2012.

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Windows applications recompiled for ARM Thumb and linked with Winelib, from the Wine project, can run on 32-bit or 64-bit ARM Thumb in Linux, FreeBSD, or other compatible operating systems.

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