The early MIPS III architectures were 32-bit; 64-bit versions were developed later.
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28 Facts About MIPS III
1.
2.
In March 2021, MIPS III announced that the development of the MIPS III architecture had ended as the company is making the transition to RISC-V.
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3.
MIPS III was eventually implemented by a number of embedded microprocessors.
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4.
MIPS III V was completed by the integer-only MDMX extension to provide a complete system for improving the performance of 3D graphics applications.
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5.
When MIPS III Technologies was spun-out of Silicon Graphics in 1998, it refocused on the embedded market.
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7.
MIPS III is a modular architecture supporting up to four coprocessors.
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8.
MIPS III I has instructions that load and store 8-bit bytes, 16-bit halfwords, and 32-bit words.
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9.
Since MIPS III I is a 32-bit architecture, loading quantities fewer than 32 bits requires the datum to be either sign-extended or zero-extended to 32 bits.
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10.
MIPS III I requires all memory accesses to be aligned to their natural word boundaries, otherwise an exception is signaled.
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11.
MIPS III I has instructions to perform bitwise logical AND, OR, XOR, and NOR.
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12.
MIPS III I has instructions to perform left and right logical shifts and right arithmetic shifts.
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13.
MIPS III I has instructions for signed and unsigned integer multiplication and division.
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14.
MIPS III I has two instructions for software to signal an exception: System Call and Breakpoint.
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15.
MIPS III II removed the load delay slot and added several sets of instructions.
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16.
MIPS III is a backwards-compatible extension of MIPS II that added support for 64-bit memory addressing and integer operations.
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17.
MIPS III added a supervisor privilege level in between the existing kernel and user privilege levels.
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18.
MIPS III removed the Coprocessor 3 support instructions, and reused its opcodes for the new doubleword instructions.
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19.
MIPS III IV was designed to mainly improve floating-point performance.
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20.
MIPS III IV added several new FP arithmetic instructions for both single- and double-precision FPNs: fused-multiply add or subtract, reciprocal, and reciprocal square-root.
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21.
MIPS III V added a new data type, the Paired Single, which consisted of two single-precision floating-point numbers stored in the existing 64-bit floating-point registers.
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22.
MIPS III has had several calling conventions, especially on the 32-bit platform.
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23.
MIPS III EABI is supported by GCC but not LLVM, and neither supports NUBI.
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24.
MIPS III processors are used in embedded systems such as residential gateways and routers.
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25.
MIPS III processors used to be popular in supercomputers during the 1990s, but all such systems have dropped off the TOP500 list.
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26.
Sample MIPS III-based platforms include both bare metal environments and platforms for booting unmodified Linux binary images.
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27.
MARS is another GUI-based MIPS III emulator designed for use in education, specifically for use with Hennessy's Computer Organization and Design.
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28.
WebMIPS III is a browser-based MIPS III simulator with visual representation of a generic, pipelined processor.
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