14 Facts About Pentium Pro

The Pentium Pro was capable of both dual- and quad-processor configurations.

Lead architect of Pentium Pro was Fred Pollack who was specialized in superscalarity and had worked as the lead engineer of the Intel iAPX 432.

Pentium Pro incorporated a new microarchitecture, different from the Pentium's P5 microarchitecture.

The Pentium Pro implemented many radical architectural differences mirroring other contemporary x86 designs such as the NexGen Nx586 and Cyrix 6x86.

The Pentium Pro thus featured out of order execution, including speculative execution via register renaming.

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The Pentium Pro has a total of six execution units: two integer units, one floating-point unit, a load unit, store address unit, and a store data unit.

Pentium Pro introduced new instructions into the Intel range; the CMOVxx instructions can move a value that is either the contents of a register or memory location into another register or not, according to some predicate logical condition xx on the flags register, xx being a flags predicate code as given in the condition for conditional jump instructions.

This, with the high cost of Pentium Pro systems, led to tepid sales among PC buyers at the time.

In multiprocessor configurations, Pentium Pro's integrated cache skyrocketed performance in comparison to architectures which had each CPU sharing a central cache.

Process used to fabricate the Pentium Pro processor die and its separate cache memory die changed, leading to a combination of processes used in the same package:.

Eight-way Pentium Pro computers were built, but these used multiple buses.

Design of the Pentium Pro bus was influenced by Futurebus, the Intel iAPX 432 bus, and elements of the Intel i960 bus.

Pentium Pro was no doubt intimately familiar with all this history.

The Pentium Pro was designed to include the 4-way SMP split-transaction cache-coherent bus as a mandatory feature of every chip produced.