36 Facts About DRAM

Unlike flash memory, DRAM is volatile memory, since it loses its data quickly when power is removed.

DRAM typically takes the form of an integrated circuit chip, which can consist of dozens to billions of DRAM memory cells.

DRAM chips are widely used in digital electronics where low-cost and high-capacity computer memory is required.

One of the largest applications for DRAM is the main memory in modern computers and graphics cards (where the "main memory" is called the graphics memory).

In contrast, SRAM, which is faster and more expensive than DRAM, is typically used where speed is of greater concern than cost and size, such as the cache memories in processors.

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DRAM filed a patent in 1967, and was granted U S patent number 3, 387, 286 in 1968.

MOS DRAM chips were commercialized in 1969 by Advanced Memory system, Inc of Sunnyvale, CA.

The first commercial SDRAM chip was the Samsung KM48SL2000, which had a capacity of 16Mb, and was introduced in 1992.

DRAM is usually arranged in a rectangular array of charge storage cells consisting of one capacitor and transistor per data bit.

Some DRAM matrices are many thousands of cells in height and width.

Under some conditions, most of the data in DRAM can be recovered even if the DRAM has not been refreshed for several minutes.

Each bit of data in a DRAM is stored as a positive or negative electrical charge in a capacitive structure.

Up until the mid-1980s, the capacitors in DRAM cells were co-planar with the access transistor, thus they were referred to as planar capacitors.

DRAM cells featuring capacitors above the substrate are referred to as stacked or folded plate capacitors.

One-transistor, zero-capacitor DRAM cell has been a topic of research since the late-1990s.

Refreshing of cells remains necessary, but unlike with 1T1C DRAM, reads in 1T DRAM are non-destructive; the stored charge causes a detectable shift in the threshold voltage of the transistor.

DRAM cells are laid out in a regular rectangular, grid-like pattern to facilitate their control and access via wordlines and bitlines.

DRAM cell area is given as n F, where n is a number derived from the DRAM cell design, and F is the smallest feature size of a given process technology.

Bitline length is limited by the amount of operating current the DRAM can draw and by how power can be dissipated, since these two characteristics are largely determined by the charging and discharging of the bitline.

Besides ensuring that the lengths of the bitlines and the number of attached DRAM cells attached to them are equal, two basic architectures to array design have emerged to provide for the requirements of the sense amplifiers: open and folded bitline arrays.

Under some conditions most of the data in DRAM can be recovered even if it has not been refreshed for several minutes.

An asynchronous DRAM chip has power connections, some number of address inputs, and a few (typically one or four) bidirectional data lines.

Page mode DRAM is a minor modification to the first-generation DRAM IC interface which improved the performance of reads and writes to a row by avoiding the inefficiency of precharging and opening the same row repeatedly to access a different column.

Page mode DRAM was later improved with a small modification which further reduced latency.

In page mode DRAM, was asserted before the column address was supplied.

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Fast page mode DRAM was introduced in 1986 and was used with Intel 80486.

EDO RAM, sometimes referred to as Hyper Page Mode enabled DRAM, is similar to Fast Page Mode DRAM with the additional feature that a new access cycle can be started while keeping the data output of the previous cycle active.

Single-cycle EDO DRAM became very popular on video cards towards the end of the 1990s.

Single data rate SDRAM is the original generation of SDRAM; it made a single transfer of data per clock cycle.

Double data rate SDRAM was a later development of SDRAM, used in PC memory beginning in 2000.

Video DRAM is a dual-ported variant of DRAM that was once commonly used to store the frame-buffer in some graphics adaptors.

Window DRAM is a variant of VRAM that was once used in graphics adaptors such as the Matrox Millennium and ATI 3D Rage Pro.

MDRAM allows operations to two banks in a single clock cycle, permitting multiple concurrent accesses to occur if the accesses were independent.

MDRAM was primarily used in graphic cards, such as those featuring the Tseng Labs ET6x00 chipsets.

Graphics double data rate SDRAM is a type of specialized DDR SDRAM designed to be used as the main memory of graphics processing units.

GDDR SDRAM is distinct from commodity types of DDR SDRAM such as DDR3, although they share some core technologies.